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avatar for Yutaka Yasuda

Yutaka Yasuda

Kyoto Sangyo University
Assoc. Professor
building SDN/OpenFlow HW switch data-plane performance checker by FPGA
Monday, March 14
 

9:00am

12:10pm

2:15pm

2:40pm

3:05pm

3:30pm

3:45pm

4:10pm

4:35pm

 
Tuesday, March 15
 

7:30am

8:30am

9:30am

9:55am

10:20am

10:30am

11:45am

12:30pm

3:05pm

3:30pm

4:50pm

5:45pm

 
Wednesday, March 16
 

7:30am

8:30am

9:15am

10:30am

11:00am

11:45am

12:15pm

3:05pm

4:10pm

5:25pm

5:45pm

 
Thursday, March 17
 

7:30am

8:45am

11:45am

12:00pm

2:00pm

4:20pm